BIASSEL=MODE0, VCMEN=DISABLED, AD12BSSEL=FOUR, CLKESEL=RISING, SCSEL=ADCNT0, MREFLPEN=DISABLED, TRKMD=NORMAL, VREFSEL=INTERNAL_VREF, LPMDEN=DISABLED, ACCMD=ACCUMULATE, ADCEN=DISABLED, REFGNDSEL=INTERNAL, BURSTEN=DISABLED
Measurement Control
REFGNDSEL | Reference Ground Select. 0 (INTERNAL): The internal device ground is used as the ground reference for ADC conversions. 1 (EXTERNAL): The VREFGND pin is used as the ground reference for ADC conversions. |
CLKESEL | Sampling Clock Edge Select. 0 (RISING): Select the rising edge of the APB clock. 1 (FALLING): Select the falling edge of the APB clock. |
BMTK | Burst Mode Tracking Time. |
SCSEL | Start-Of-Conversion Source Select. 0 (ADCNT0): An ADC conversion triggers from the ADCnT0 (“On Demand” by writing 1 to ADBUSY) trigger source. 1 (ADCNT1): An ADC conversion triggers from the ADCnT1 (Timer 0 Low Overflow) trigger source. 2 (ADCNT2): An ADC conversion triggers from the ADCnT2 (Timer 0 High Overflow) trigger source. 3 (ADCNT3): An ADC conversion triggers from the ADCnT3 (Timer 1 Low Overflow) trigger source. 4 (ADCNT4): An ADC conversion triggers from the ADCnT4 (Timer 1 High Overflow) trigger source. 5 (ADCNT5): An ADC conversion triggers from the ADCnT5 (EPCA0 synchronization pulse) trigger source. 6 (ADCNT6): An ADC conversion triggers from the ADCnT6 (I2C0 Timer overflow) trigger source. 7 (ADCNT7): An ADC conversion triggers from the ADCnT7 (I2C1 Timer overflow) trigger source. 8 (ADCNT8): An ADC conversion triggers from the ADCnT8 (SSG phase defined by ADSP bits) trigger source. 9 (ADCNT9): An ADC conversion triggers from the ADCnT9 (RESERVED) trigger source. 10 (ADCNT10): An ADC conversion triggers from the ADCnT10 (RESERVED) trigger source. 11 (ADCNT11): An ADC conversion triggers from the ADCnT11 (RESERVED) trigger source. 12 (ADCNT12): An ADC conversion triggers from the ADCnT12 (RESERVED) trigger source. 13 (ADCNT13): An ADC conversion triggers from the ADCnT13 (RESERVED) trigger source. 14 (ADCNT14): An ADC conversion triggers from the ADCnT14 (RESERVED) trigger source. 15 (ADCNT15): An ADC conversion triggers from the ADCnT15 (PB0.12) trigger source. |
PWRTIME | Burst Mode Power Up Time. |
BURSTEN | Burst Mode Enable. 0 (DISABLED): Disable burst mode. 1 (ENABLED): Enable burst mode. |
ADCEN | ADC Enable. 0 (DISABLED): Disable the ADC (low-power shutdown). 1 (ENABLED): Enable the ADC (active and ready for data conversions). |
AD12BSSEL | 12-Bit Mode Sample Select. 0 (FOUR): The ADC re-samples the input before each of the four conversions. 1 (ONE): The ADC samples once before the first conversion and converts four times. |
VCMEN | Common Mode Buffer Enable. 0 (DISABLED): Disable the common mode buffer. 1 (ENABLED): Enable the common mode buffer. |
ACCMD | Accumulation Mode. 0 (ACCUMULATE): Conversions will be accumulated for the specified number of cycles in burst mode according to the channel configuration. 1 (REPEAT): Conversions will not be accumulated in burst mode. |
TRKMD | ADC Tracking Mode. 0 (NORMAL): Normal Tracking Mode: When the ADC is enabled, a conversion begins immediately following the start-of-conversion signal. 1 (DELAYED): Delayed Tracking Mode: When the ADC is enabled, a conversion begins 3 SAR clock cycles following the start-of-conversion signal. The ADC is allowed to track during this time. |
ADBUSY | ADC Busy. |
BIASSEL | Bias Power Select. 0 (MODE0): Select bias current mode 0. Recommended to use modes 1, 2, or 3. 1 (MODE1): Select bias current mode 1 (SARCLK = 16 MHz). 2 (MODE2): Select bias current mode 2. 3 (MODE3): Select bias current mode 3 (SARCLK = 4 MHz). |
LPMDEN | Low Power Mode Enable. 0 (DISABLED): Disable low power mode. 1 (ENABLED): Enable low power mode (requires extended tracking time). |
MREFLPEN | MUX and VREF Low Power Enable. 0 (DISABLED): Disable low power mode. 1 (ENABLED): Enable low power mode (SAR clock <= 4 MHz). |
VREFSEL | Voltage Reference Select. 0 (INTERNAL_VREF): Select the internal, dedicated SARADC voltage reference as the ADC reference. 1 (VDD): Select the VDD pin as the ADC reference. 2 (LDO_OUT): Select the output of the internal LDO regulator (~1.8 V) as the ADC reference. 3 (EXTERNAL_VREF): Select the VREF pin as the ADC reference. This option is used for either an external VREF or the on-chip VREF driving out to the VREF pin. |